1. Field of Invention
The invention relates generally to testing electronic devices and more particularly to increased throughput of a test system.
2. Related Art
During the manufacture of semiconductor devices, it is known to test the devices to ensure that they are working properly. Frequently, multiple tests are performed on each device, with each test involving applying stimulus signals to the device and then measuring response signals output by the device.
To support the large number of tests that must be performed in a semiconductor manufacturing facility, testing is performed by automatic test equipment. The test equipment can be programmed to generate electrical signals that can be applied to the device under test as a test stimulus. The test equipment can also be programmed to capture outputs from the device under test.
The captured signals are analyzed to determine whether the device under test is operating properly. If the analysis reveals that the device is not operating fully as desired, the manufacturing process performed on a device may be altered. For example, following testing, faulty devices may be discarded without further processing. Alternatively, devices that operate, but without meeting all desired performance criteria, can be “binned.” Binning allows partially functioning devices to be sold, though often at a reduced price.
The nature of the output signals captured by a test system depends on the intended function of the device under test. Some semiconductor devices produce only digital outputs. Though, other devices produce only analog outputs or both analog and digital outputs. For example, semiconductor chips intended as controllers for cellular telephones or disk drives produce analog outputs. To support testing of devices that have analog outputs, automatic test equipment has analog signal capture components and signal processing circuitry, such as a digital signal processor, which may be dedicated hardware, or may be a general purpose processing unit performing digital signal processing operations. The digital signal processor processes the samples to determine values for parameters of the output signals, which can then be compared to acceptable ranges for those parameters to determine performance of the device under test. Examples of these parameters include signal amplitude, total harmonic distortion, in-band noise and magnitude of inter-modulation signals.
Testing of devices that produce analog output signals is generally performed using periodic signals, frequently sinusoidal signals. The output signals, once the device under test has responded to the input signal, is also likely to be periodic. This response does not occur instantaneously. Rather, immediately following application or change in a stimulus signal, there may a transition interval as the output transitions to a steady-state, periodic signal.
This transition interval is sometimes called a “settling interval,” or “settling time”, because the output signal is seen to be “settling” into its steady state condition. The signal may also be said to include a “near-DC drift” component during this interval, because the periodic signal, though oscillating during the settling interval, appears to oscillate about a level that changes slowly over time. The point about which the output signal oscillates “drifts” towards the point about which the output signal oscillates when it is settled. The near-DC drift, at any given time, represents the difference between this origin of the oscillation at that time during the settling interval and the origin of oscillation at steady state.
Particularly when testing what should be a periodic analog signal, if samples of a signal are collected while the signal is settling, values of parameters of the signal determined by processing those samples may yield incorrect conclusions about operation of the device. Such incorrect conclusions may be due to the influence of the drift on such measurements as Voltage Peak (Vpk) for instance, or due to spectral leakage in the frequency domain caused by the near-DC drift, as another example. To avoid incorrect test results, it is known in testing semiconductor devices to either not collect samples during the settling interval or to discard, without analyzing, samples collected during this settling interval. The settling interval may be set based on a desired level of accuracy, but may, for example, be the time it takes the DC drift to decrease by 95%. The settling time may alternatively be set empirically, as “enough” time that sufficiently few devices fail that would otherwise pass if a longer wait time was implemented.
The settling interval may be on the order of milliseconds or tens or hundreds of milliseconds for example. A full device test may require hundreds or thousands of individual tests, so these settling times add up. This settling time can be a relatively high percentage of the total time required to test a semiconductor device. The need to wait for output signals to settle every time a stimulus signal is applied or changed can create a scenario called “device limited throughput.” Device limited throughput means that an automatic test system deployed in a semiconductor manufacturing environment has a capacity to test devices at a higher rate and could test devices at a higher rate were it not waiting during the settling intervals to gather usable samples.
Because of the high cost of establishing a semiconductor testing facility to support semiconductor manufacturing, and because such costs must be proportionally allocated to the total cost of manufacture of each device tested, having device limited throughput is undesirable.